文献
J-GLOBAL ID:201702276392952829
整理番号:17A0085398
高いON電流と負の出力微分抵抗を持つ負性キャパシタンス・トランジスターの解析と小型モデリング-第I部:モデルの説明
Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance-Part I: Model Description
著者 (7件):
Pahwa Girish
(Department of Electrical Engineering, Nanolab, IIT Kanpur, Kanpur, India)
,
Dutta Tapas
(Department of Electrical Engineering, Nanolab, IIT Kanpur, Kanpur, India)
,
Agarwal Amit
(Department of Physics, IIT Kanpur, Kanpur, India)
,
Khandelwal Sourabh
(Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA)
,
Salahuddin Sayeef
(Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA)
,
Hu Chenming
(Department of Electrical Engineering and Computer Sciences, University of California at Berkeley, Berkeley, CA, USA)
,
Chauhan Yogesh Singh
(Department of Electrical Engineering, Nanolab, IIT Kanpur, Kanpur, India)
資料名:
IEEE Transactions on Electron Devices
(IEEE Transactions on Electron Devices)
巻:
63
号:
12
ページ:
4981-4985
発行年:
2016年
JST資料番号:
C0222A
ISSN:
0018-9383
CODEN:
IETDAI
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)