文献
J-GLOBAL ID:201702281108601247
整理番号:17A0754803
温度分布を考慮した高速ウエハレベルIO実験計画と適応リフレッシュを備えた1.2V,20nmの307GB/s HBM DRAM【Powered by NICT】
A 1.2 V 20 nm 307 GB/s HBM DRAM With At-Speed Wafer-Level IO Test Scheme and Adaptive Refresh Considering Temperature Distribution
著者 (19件):
Sohn Kyomin
(Samsung Electronics, Hwaseong, South Korea)
,
Yun Won-Joo
(Samsung Electronics, Hwaseong, South Korea)
,
Oh Reum
(Samsung Electronics, Hwaseong, South Korea)
,
Oh Chi-Sung
(Samsung Electronics, Hwaseong, South Korea)
,
Seo Seong-Young
(Samsung Electronics, Hwaseong, South Korea)
,
Park Min-Sang
(Samsung Electronics, Hwaseong, South Korea)
,
Shin Dong-Hak
(Samsung Electronics, Hwaseong, South Korea)
,
Jung Won-Chang
(Samsung Electronics, Hwaseong, South Korea)
,
Shin Sang-Hoon
(Samsung Electronics, Hwaseong, South Korea)
,
Ryu Je-Min
(Samsung Electronics, Hwaseong, South Korea)
,
Yu Hye-Seung
(Samsung Electronics, Hwaseong, South Korea)
,
Jung Jae-Hun
(Samsung Electronics, Hwaseong, South Korea)
,
Lee Hyunui
(Samsung Electronics, Hwaseong, South Korea)
,
Kang Seok-Yong
(Samsung Electronics, Hwaseong, South Korea)
,
Sohn Young-Soo
(Samsung Electronics, Hwaseong, South Korea)
,
Choi Jung-Hwan
(Samsung Electronics, Hwaseong, South Korea)
,
Bae Yong-Cheol
(Samsung Electronics, Hwaseong, South Korea)
,
Jang Seong-Jin
(Samsung Electronics, Hwaseong, South Korea)
,
Jin Gyoyoung
(Samsung Electronics, Hwaseong, South Korea)
資料名:
IEEE Journal of Solid-State Circuits
(IEEE Journal of Solid-State Circuits)
巻:
52
号:
1
ページ:
250-260
発行年:
2017年
JST資料番号:
B0761A
ISSN:
0018-9200
CODEN:
IJSCBC
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)