文献
J-GLOBAL ID:201702281720534983
整理番号:17A1250959
現代プロセッサの命令に基づくトレース信号選択によるPresiliconとポストシリコンデバッグの橋渡し【Powered by NICT】
Bridging Presilicon and Postsilicon Debugging by Instruction-Based Trace Signal Selection in Modern Processors
著者 (3件):
Refan Fatemeh
(School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran)
,
Alizadeh Bijan
(School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran)
,
Navabi Zainalabedin
(School of Electrical and Computer Engineering, College of Engineering, University of Tehran, Tehran, Iran)
資料名:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
(IEEE Transactions on Very Large Scale Integration (VLSI) Systems)
巻:
25
号:
7
ページ:
2059-2070
発行年:
2017年
JST資料番号:
W0516A
ISSN:
1063-8210
CODEN:
ITCOB4
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)