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J-GLOBAL ID:201702281836235140
整理番号:17A1345127
高抵抗トラップリッチSOIにおけるDC30GHz DPDTスイッチ行列設計【Powered by NICT】
DC 30-GHz DPDT Switch Matrix Design in High Resistivity Trap-Rich SOI
著者 (7件):
Yu Bo
(School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore)
,
Ma Kaixue
(School of Physical Electronics, University of Electronic Science and Technology of China, Chengdu, China)
,
Meng Fanyi
(School of Physical Electronics, University of Electronic Science and Technology of China, Chengdu, China)
,
Yeo Kiat Seng
(Singapore University of Technology and Design, Singapore)
,
Shyam Parthasarathy
(Department of Technology Development, Globalfoundries, Singapore)
,
Zhang Shaoqiang
(Department of Technology Development, Globalfoundries, Singapore)
,
Verma Purakh Raj
(Department of Technology Development, Globalfoundries, Singapore)
資料名:
IEEE Transactions on Electron Devices
(IEEE Transactions on Electron Devices)
巻:
64
号:
9
ページ:
3548-3554
発行年:
2017年
JST資料番号:
C0222A
ISSN:
0018-9383
CODEN:
IETDAI
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)