文献
J-GLOBAL ID:201702282186152022
整理番号:17A0754791
新システムパイプライン設計を用いた8K H.265/HEVCビデオデコーダチップ【Powered by NICT】
An 8K H.265/HEVC Video Decoder Chip With a New System Pipeline Design
著者 (11件):
Zhou Dajiang
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Wang Shihao
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Sun Heming
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Zhou Jianbin
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Zhu Jiayi
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Zhao Yijin
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Zhou Jinjia
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Zhang Shuping
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Kimura Shinji
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Yoshimura Takeshi
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
,
Goto Satoshi
(Graduate School of Information, Production and Systems, Waseda University, Kitakyushu, Japan)
資料名:
IEEE Journal of Solid-State Circuits
(IEEE Journal of Solid-State Circuits)
巻:
52
号:
1
ページ:
113-126
発行年:
2017年
JST資料番号:
B0761A
ISSN:
0018-9200
CODEN:
IJSCBC
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)