文献
J-GLOBAL ID:201702282198692300
整理番号:17A1650993
SRAM NVMハイブリッドFPGAのための実行時と再構成二重を意識した配置【Powered by NICT】
Runtime and reconfiguration dual-aware placement for SRAM-NVM hybrid FPGAs
著者 (6件):
Lou Qian
(School of Computer Science and Technology, Shandong University, Jinan, China)
,
Zhao Mengying
(School of Computer Science and Technology, Shandong University, Jinan, China)
,
Ju Lei
(School of Computer Science and Technology, Shandong University, Jinan, China)
,
Xue Chun Jason
(Department of Computer Science, City University of Hong Kong, Hong Kong)
,
Hu Jingtong
(School of Electrical and Computer Engineering, Oklahoma State University, Stillwater, OK, USA)
,
Jia Zhiping
(School of Computer Science and Technology, Shandong University, Jinan, China)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2017
号:
NVMSA
ページ:
1-6
発行年:
2017年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)