文献
J-GLOBAL ID:201702284254036437
整理番号:17A1344848
65nm CMOSにおける1ビットデルタシグマ形周波数対ディジタル変換器を用いた5GHzディジタル分数N PLL【Powered by NICT】
A 5GHz Digital Fractional- $N$ PLL Using a 1-bit Delta-Sigma Frequency-to-Digital Converter in 65 nm CMOS
著者 (9件):
Talegaonkar Mrunmay
(Inphi Corporation, Irvine, CA, USA)
,
Anand Tejasvi
(Department of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA)
,
Elkholy Ahmed
(Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL, USA)
,
Elshazly Amr
(Intel Corporation, Hillsboro, OR, USA)
,
Nandwana Romesh Kumar
(Cisco Systems, Allentown, PA, USA)
,
Saxena Saurabh
(Department of Electrical Engineering, IIT Madras, Chennai, TN, India)
,
Young Brian
(ON Semiconductor, Corvallis, OR, USA)
,
Choi Woo-Seok
(Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL, USA)
,
Hanumolu Pavan Kumar
(Department of Electrical and Computer Engineering, University of Illinois at Urbana-Champaign, Urbana, IL, USA)
資料名:
IEEE Journal of Solid-State Circuits
(IEEE Journal of Solid-State Circuits)
巻:
52
号:
9
ページ:
2306-2320
発行年:
2017年
JST資料番号:
B0761A
ISSN:
0018-9200
CODEN:
IJSCBC
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)