文献
J-GLOBAL ID:201702286449596926
整理番号:17A0048516
28nm CMOSの高速・高周波ICにおけるESD保護についての協調設計の体系的研究
A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS
著者 (13件):
Lu Fei
(Department of Electrical and Computer Engineering, University of California, Riverside, CA, USA)
,
Ma Rui
(Department of Electrical and Computer Engineering, University of California, Riverside, CA, USA)
,
Dong Zongyu
(Qualcomm, San Diego, CA, USA)
,
Wang Li
(Skyworks Solutions, Newbury Park, CA, USA)
,
Zhang Chen
(Fairchild Semiconductor, Irvine, CA, USA)
,
Wang Chenkun
(Department of Electrical and Computer Engineering, University of California, Riverside, CA, USA)
,
Chen Qi
(Department of Electrical and Computer Engineering, University of California, Riverside, CA, USA)
,
Wang X. Shawn
(Department of Electrical and Engineering, University of California, Los Angeles, CA, USA)
,
Zhang Feilong
(Department of Electrical and Computer Engineering, University of California, Riverside, CA, USA)
,
Li Cheng
(Department of Electrical and Computer Engineering, University of California, Riverside, CA, USA)
,
Tang He
(University of Electronic Science and Technology of China, Chengdu, China)
,
Cheng Yuhua
(SHRIME, Peking University, Shanghai, China)
,
Wang Albert
(Department of Electrical and Computer Engineering, University of California, Riverside, CA, USA)
資料名:
IEEE Transactions on Circuits and Systems 1: Regular Papers
(IEEE Transactions on Circuits and Systems 1: Regular Papers)
巻:
63
号:
10
ページ:
1746-1757
発行年:
2016年
JST資料番号:
C0226B
ISSN:
1549-8328
CODEN:
ITCSCH
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)