文献
J-GLOBAL ID:201802215510514122
整理番号:18A1620958
フラッシュAD変換器とTDCを組み合わせた900MHz,3.5mW,8ビットパイプライン化スブランングADC【JST・京大機械翻訳】
A 900-MHz, 3.5-mW, 8-bit Pipelined Subranging ADC Combining Flash ADC and TDC
著者 (7件):
Ohhata Kenichi
(Department of Electrical and Electronics Engineering, Kagoshima University, Kagoshima, Japan)
,
Hayakawa Daiki
(Department of Electrical and Electronics Engineering, Kagoshima University, Kagoshima, Japan)
,
Sewaki Kenji
(Department of Electrical and Electronics Engineering, Kagoshima University, Kagoshima, Japan)
,
Imayanagida Kento
(Department of Electrical and Electronics Engineering, Kagoshima University, Kagoshima, Japan)
,
Ueno Kouki
(Department of Electrical and Electronics Engineering, Kagoshima University, Kagoshima, Japan)
,
Sonoda Yuuki
(Department of Electrical and Electronics Engineering, Kagoshima University, Kagoshima, Japan)
,
Muroya Kenichiro
(Department of Electrical and Electronics Engineering, Kagoshima University, Kagoshima, Japan)
資料名:
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
(IEEE Transactions on Very Large Scale Integration (VLSI) Systems)
巻:
26
号:
9
ページ:
1777-1787
発行年:
2018年
JST資料番号:
W0516A
ISSN:
1063-8210
CODEN:
ITCOB4
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)