文献
J-GLOBAL ID:201802244588900608
整理番号:18A1997401
STT-MRAM内での高信頼性および低電力コンピューティング-イン-メモリ実装【JST・京大機械翻訳】
A high-reliability and low-power computing-in-memory implementation within STT-MRAM
著者 (7件):
Zhang Liuyang
(Fert Beijing Institute and School of Electronic and Information Engineering, Beihang University, Beijing, 100191, China)
,
Deng Erya
(Fert Beijing Institute and School of Electronic and Information Engineering, Beihang University, Beijing, 100191, China)
,
Cai Hao
(National ASIC System Engineering Center, Southeast University, Nanjing, 210096, China)
,
Wang You
(Fert Beijing Institute and School of Electronic and Information Engineering, Beihang University, Beijing, 100191, China)
,
Torres Lionel
(LIRMM, University of Montpellier, CNRS, Montpellier, 34095, France)
,
Todri-Sanial Aida
(LIRMM, University of Montpellier, CNRS, Montpellier, 34095, France)
,
Zhang Youguang
(Fert Beijing Institute and School of Electronic and Information Engineering, Beihang University, Beijing, 100191, China)
資料名:
Microelectronics Journal
(Microelectronics Journal)
巻:
81
ページ:
69-75
発行年:
2018年
JST資料番号:
A0186A
ISSN:
0026-2692
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
イギリス (GBR)
言語:
英語 (EN)