文献
J-GLOBAL ID:201802267586207703
整理番号:18A1243452
超スケールナノプレート垂直FETと6T-SRAMのための電気特性の解析と設計指針の提案【JST・京大機械翻訳】
Analysis of electrical characteristics and proposal of design guide for ultra-scaled nanoplate vertical FET and 6T-SRAM
著者 (8件):
Seo Youngsoo
(Inter-University Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 151-747, South Korea)
,
Kim Shinkeun
(Inter-University Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 151-747, South Korea)
,
Ko Kyul
(Inter-University Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 151-747, South Korea)
,
Woo Changbeom
(Inter-University Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 151-747, South Korea)
,
Kim Minsoo
(Inter-University Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 151-747, South Korea)
,
Lee Jangkyu
(Inter-University Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 151-747, South Korea)
,
Kang Myounggon
(Department of Electronics Engineering, Korea National University of Transportation, Chungju 380-702, South Korea)
,
Shin Hyungcheol
(Inter-University Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 151-747, South Korea)
資料名:
Solid-State Electronics
(Solid-State Electronics)
巻:
140
ページ:
69-73
発行年:
2018年
JST資料番号:
H0225A
ISSN:
0038-1101
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
イギリス (GBR)
言語:
英語 (EN)