文献
J-GLOBAL ID:201802274933256726
整理番号:18A1769717
変圧器のANNに基づく差動保護のハードウェアインループ実装【JST・京大機械翻訳】
Hardware-in-Loop Implementation of ANN Based Differential Protection of Transformer
著者 (5件):
Thote Pankaj B.
(Department of Electrical Engineering, S. B. Jain Inst. of Tech. Management & Research, Nagpur, India)
,
Daigavane Manoj B.
(Department of Electrical Engineering, G. H. Raisoni College of Engineering, Nagpur, India)
,
Daigavane Prema M.
(Department of Electrical Engineering, G. H. Raisoni College of Engineering, Nagpur, India)
,
kamble Saurabh
(Department of Electrical Engineering, S. B. Jain Inst. of Tech. Management & Research, Nagpur, India)
,
Rathore Chandrakant
(Department of Electrical Engineering, S. B. Jain Inst. of Tech. Management & Research, Nagpur, India)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2017
号:
WIECON-ECE
ページ:
80-83
発行年:
2017年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)