文献
J-GLOBAL ID:201802282377996356
整理番号:18A1044403
0.18μm CMOS技術による内蔵クロックを持つマルチチャネルマルチギガビットPRBS発生器【JST・京大機械翻訳】
Multi-channel multi-gigabit PRBS generator with a built-in clock in 0.18-μm CMOS technology
著者 (5件):
Wu Chi-Hsien
(Department of Electronics Engineering, National Kaohsiung University of Applied Sciences, Kaohsiung City, Taiwan)
,
Jou Jau-Ji
(Department of Electronics Engineering, National Kaohsiung University of Applied Sciences, Kaohsiung City, Taiwan)
,
Ting Hsin-Wen
(Department of Electronics Engineering, National Kaohsiung University of Applied Sciences, Kaohsiung City, Taiwan)
,
Chu Shao-I
(Department of Electronics Engineering, National Kaohsiung University of Applied Sciences, Kaohsiung City, Taiwan)
,
Liu Bing-Hong
(Department of Electronics Engineering, National Kaohsiung University of Applied Sciences, Kaohsiung City, Taiwan)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2017
号:
ISOCC
ページ:
276-277
発行年:
2017年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)