文献
J-GLOBAL ID:201902212045912226
整理番号:19A1936369
低漏れSRAMビットセルの設計【JST・京大機械翻訳】
Design of Low Leakage SRAM Bitcell
著者 (6件):
Safaryan Karo
(Synopsys Armenia Educational Department, Chair of Microelectronic Circuits and Systems National Polytechnic University of Armenia, Yerevan, Armenia)
,
Bazikyan Mher
(Synopsys Armenia Educational Department, Chair of Microelectronic Circuits and Systems National Polytechnic University of Armenia, Yerevan, Armenia)
,
Aslikyan Fadey
(Synopsys Armenia Educational Department, Chair of Microelectronic Circuits and Systems National Polytechnic University of Armenia, Yerevan, Armenia)
,
Harutyunyan Stepan
(Synopsys Armenia Educational Department, Chair of Microelectronic Circuits and Systems National Polytechnic University of Armenia, Yerevan, Armenia)
,
Hakobyan Garik
(Synopsys Armenia Educational Department, Chair of Microelectronic Circuits and Systems National Polytechnic University of Armenia, Yerevan, Armenia)
,
Petrosyan Artur
(Synopsys Armenia Educational Department, Chair of Microelectronic Circuits and Systems National Polytechnic University of Armenia, Yerevan, Armenia)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2019
号:
ELNANO
ページ:
245-248
発行年:
2019年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)