文献
J-GLOBAL ID:202002271464485151
整理番号:20A1414601
低抵抗GaAs/Siヘテロ界面を作製するための表面活性化による室温での化学結合【JST・京大機械翻訳】
Chemical bonding at room temperature via surface activation to fabricate low-resistance GaAs/Si heterointerfaces
著者 (8件):
Ohno Yutaka
(Institute for Materials Research (IMR), Tohoku University, 2-1-1 Katahira, Aoba-ku, Sendai 980-8577, Japan)
,
Liang Jianbo
(Graduate School of Engineering, Osaka-City University, 3-3-138 Sugimoto, Sumiyoshi, Osaka 558-8585, Japan)
,
Shigekawa Naoteru
(Graduate School of Engineering, Osaka-City University, 3-3-138 Sugimoto, Sumiyoshi, Osaka 558-8585, Japan)
,
Yoshida Hideto
(The Institute of Scientific and Industrial Research (ISIR), Osaka University, 8-1 Mihogaoka, Ibaraki, Osaka 567-0047, Japan)
,
Takeda Seiji
(The Institute of Scientific and Industrial Research (ISIR), Osaka University, 8-1 Mihogaoka, Ibaraki, Osaka 567-0047, Japan)
,
Miyagawa Reina
(Department of Physical Science and Engineering, Nagoya Institute of Technology, Gokiso-cho, Nagoya 466-8555, Japan)
,
Shimizu Yasuo
(Institute for Materials Research (IMR), Tohoku University, 2145-2 Narita-cho, Oarai, Ibaraki 311-1313, Japan)
,
Nagai Yasuyoshi
(Institute for Materials Research (IMR), Tohoku University, 2145-2 Narita-cho, Oarai, Ibaraki 311-1313, Japan)
資料名:
Applied Surface Science
(Applied Surface Science)
巻:
525
ページ:
Null
発行年:
2020年
JST資料番号:
B0707B
ISSN:
0169-4332
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
オランダ (NLD)
言語:
英語 (EN)