文献
J-GLOBAL ID:202002282976216381
整理番号:20A2277031
スイッチトキャパシタ回路のためのスレイング軽減技術【JST・京大機械翻訳】
Slewing Mitigation Technique for Switched Capacitor Circuits
著者 (5件):
Kareppagoudr Manjunath
(School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA)
,
Shakya Jyotindra
(School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA)
,
Caceres Emanuel
(School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA)
,
Kuo Yu-Wen
(School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA)
,
Temes Gabor C.
(School of Electrical Engineering and Computer Science, Oregon State University, Corvallis, OR, USA)
資料名:
IEEE Transactions on Circuits and Systems 1: Regular Papers
(IEEE Transactions on Circuits and Systems 1: Regular Papers)
巻:
67
号:
10
ページ:
3251-3261
発行年:
2020年
JST資料番号:
C0226B
ISSN:
1549-8328
CODEN:
ITCSCH
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)