文献
J-GLOBAL ID:202002286283548312
整理番号:20A2499988
28nm CMOSにおけるNANDベースアナログ支援ループを有するNMOSディジタルLDO【JST・京大機械翻訳】
An NMOS Digital LDO With NAND-Based Analog-Assisted Loop in 28-nm CMOS
著者 (5件):
Ma Xiaofei
(Institute of Integrated Circuits and Systems, University of Electronic Science and Technology of China, Chengdu, China)
,
Lu Yan
(State Key Laboratory of Analog and Mixed-Signal VLSI, Institute of Microelectronics, University of Macau, Macao, China)
,
Li Qiang
(Institute of Integrated Circuits and Systems, University of Electronic Science and Technology of China, Chengdu, China)
,
Ki Wing-Hung
(Department of Electronic and Computer Engineering, The Hong Kong University of Science and Technology, Hong Kong)
,
Martins Rui P.
(State Key Laboratory of Analog and Mixed-Signal VLSI, Institute of Microelectronics, University of Macau, Macao, China)
資料名:
IEEE Transactions on Circuits and Systems 1: Regular Papers
(IEEE Transactions on Circuits and Systems 1: Regular Papers)
巻:
67
号:
11
ページ:
4041-4052
発行年:
2020年
JST資料番号:
C0226B
ISSN:
1549-8328
CODEN:
ITCSCH
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)