文献
J-GLOBAL ID:202102230606260899
整理番号:21A2982305
FPGAと1ビットサンプラに基づく高性能モノビットDFTの設計【JST・京大機械翻訳】
Design of A High Performance Monobit DFT Based on FPGA and 1-Bit Samplers
著者 (4件):
Ji Pengfei
(National University of Defense Technology,State Key Laboratory of Complex Electromagnetic Environment Effects on Electronics and Information System,Changsha,China)
,
Lv Huan
(National University of Defense Technology,State Key Laboratory of Complex Electromagnetic Environment Effects on Electronics and Information System,Changsha,China)
,
Shi Qingzhan
(National University of Defense Technology,State Key Laboratory of Complex Electromagnetic Environment Effects on Electronics and Information System,Changsha,China)
,
Yuan Naichang
(National University of Defense Technology,State Key Laboratory of Complex Electromagnetic Environment Effects on Electronics and Information System,Changsha,China)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2020
号:
ICISCE
ページ:
2375-2379
発行年:
2020年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)