文献
J-GLOBAL ID:202202238420019789
整理番号:22A0956252
オンチップICの高速I/O ESD保護のためのDTSCRの設計と最適化【JST・京大機械翻訳】
Design and optimization of DTSCR for high-speed I/O ESD protection of on-chip ICs
著者 (6件):
Liang Hailian
(Department of Electronic Engineering, Engineering Research Center of IoT Technology Applications (Ministry of Education), Jiangnan University, Wuxi 214122, People’s Republic of China)
,
Yang Yanni
(Department of Electronic Engineering, Engineering Research Center of IoT Technology Applications (Ministry of Education), Jiangnan University, Wuxi 214122, People’s Republic of China)
,
Sun Jun
(Process Development Department, CSMC, Wuxi 214028, People’s Republic of China)
,
Liu Junliang
(Department of Electronic Engineering, Engineering Research Center of IoT Technology Applications (Ministry of Education), Jiangnan University, Wuxi 214122, People’s Republic of China)
,
Cao Xiyue
(Department of Electronic Engineering, Engineering Research Center of IoT Technology Applications (Ministry of Education), Jiangnan University, Wuxi 214122, People’s Republic of China)
,
Gu Xiaofeng
(Department of Electronic Engineering, Engineering Research Center of IoT Technology Applications (Ministry of Education), Jiangnan University, Wuxi 214122, People’s Republic of China)
資料名:
Semiconductor Science and Technology
(Semiconductor Science and Technology)
巻:
37
号:
4
ページ:
045009 (6pp)
発行年:
2022年
JST資料番号:
E0503B
ISSN:
0268-1242
CODEN:
SSTEET
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
イギリス (GBR)
言語:
英語 (EN)