文献
J-GLOBAL ID:202202265217475338
整理番号:22A0906337
性能を改善したソースポケット技術ヘテロゲート誘電体SOIトンネルFET【JST・京大機械翻訳】
Source pocket-engineered hetero-gate dielectric SOI Tunnel FET with improved performance
著者 (5件):
Sharma Vanshaj
(Department of Electronics and Communication Engineering, NIT Hamirpur, Hamirpur 177005, Himachal Pradesh, India)
,
Kumar Sanjay
(Department of Electronics and Communication Engineering, IIIT Bhagalpur, Bhagalpur 813210, Bihar, India)
,
Talukdar Jagritee
(Department of Electronics and Communication Engineering, NIT Silchar, Silchar 788010, Assam, India)
,
Mummaneni Kavicharan
(Department of Electronics and Communication Engineering, NIT Silchar, Silchar 788010, Assam, India)
,
Rawat Gopal
(Department of Electronics and Communication Engineering, NIT Hamirpur, Hamirpur 177005, Himachal Pradesh, India)
資料名:
Materials Science in Semiconductor Processing
(Materials Science in Semiconductor Processing)
巻:
143
ページ:
Null
発行年:
2022年
JST資料番号:
W1055A
ISSN:
1369-8001
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
イギリス (GBR)
言語:
英語 (EN)