文献
J-GLOBAL ID:202202291204333914
整理番号:22A0482707
28nm CMOSにおける改良型BIST-TDCによるDTCのミスマッチ解析【JST・京大機械翻訳】
Mismatch Analysis of DTCs With an Improved BIST-TDC in 28-nm CMOS
著者 (6件):
Chen Peng
(University of Macau, Macau, China)
,
Yin Jun
(Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China)
,
Zhang Feifei
(School of Electrical and Electronic Engineering, University College Dublin, Dublin D4, Ireland)
,
Mak Pui-In
(Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China)
,
Martins Rui P.
(Department of ECE, State-Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, University of Macau, Macau, China)
,
Staszewski Robert Bogdan
(School of Electrical and Electronic Engineering, University College Dublin, Dublin D4, Ireland)
資料名:
IEEE Transactions on Circuits and Systems 1: Regular Papers
(IEEE Transactions on Circuits and Systems 1: Regular Papers)
巻:
69
号:
1
ページ:
196-206
発行年:
2022年
JST資料番号:
C0226B
ISSN:
1549-8328
CODEN:
ITCSCH
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)