G.-S. Jeong, H. Chi, K. Kim, and D.-K. Jeong, “A 20-Gb/s 1.27pJ/b low-power optical receiver front-end in 65nm CMOS,” Proc. of IEEE International Symposium on Circuits and Systems (ISCAS) 2014, Melbourne, VIC, Australia, June 1-5, DOI: 10.1109/ISCAS.2014.6865429 (2014-5).
W. Ahmad, M. Abdulaziz, M. Törmänen, H. Sjöland, “CMOS adaptive TIA with embedded single-ended to differential conversion for analog optical links,” Proc. of IEEE ISCAS 2015, Lisbon, Portugal, May 24-27, DOI: 10.1109/ISCAS.2015.7168719 (2015-5).
J.L. González, R. Polster, G. Waltener, Y. Thonnart, and E. Cassan, “10 Gbps, 560 fJ/b TIA and modulator driver for optical networks-on-chip in CMOS 65nm,” Proc. of IEEE International New Circuits and Systems Conference 2016, Vancouver, Canada, June 26-29, DOI: 10.1109/NEWCAS.2016.7604796 (2016-6).