2001 - Optimization of Algorithms used in Circuit Design
1993 - 超高速算術論理演算器(ALU)研究・開発
1991 - 超高速プロセッサの技術に関する研究
1991 - 自己同期システムの設計に関する研究
1991 - Research on the techniques for Very High Speed Processors
1991 - Research on the Design of Self-Timed Systems
1988 - 耐故障システムの設計に関する研究
1988 - Research on the Design of Fault-Tolerant Systems
Research AND DEVELOPMENT OF VERY HIGH SPEED ALUs.
全件表示
論文 (4件):
Alberto Palacios Pawlovsky, Makoto Hozaki. A New Way of Applying Spatial Filters and Wavelets to Reduce Noise in Medical Images. Proceedings of IEEE TENCON 2016. 2016. 1006-1009
Alberto Palacios Pawlovsky, Daisuke Kurematsu. Improving the Accuracy of the kNN Method when Using an Even Number k of Neighbors. International Conference on Biomedical and Health Informatics, ICBHI 2015. 2015
Alberto Palacios Pawlovsky, Takumi Akiyoshi, Junja Hasegawa, Akihiro Asanuma. Improving the kNN Method for Breast Cancer Diagnosis. 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, EMBC 2015. 2015. 25-29
Palacios Pawlovsky, Alberto. Software Tool for the Analysis of Gate Activation in the ISCAS 85 Combinational Circuits. Proceedings of the XXI Iberchip Workshop. 2015. 24-27
AkiraYaguchi, Alberto Palacios Pawlovsky, Akihiro Nikaido. A Study of the Influence of Increasing the Number of Crossover Points in a Genetic Algorithm that Searches for an Input Pair that Cause the Maximum Number of Switching Gates in a Combinational Circuit. Proceedings of the XV Iberchip Workshop 2009. 2009. 1. 107-110
Akiko Miyashita, Alberto Palacios Pawlovsky, Ichiro Ruiz Obregon. A Comparative Study of Two Hybrid Heuristic Methods for Searching for the Input Pair that Cause the Maximum Number of Switching Gates in a Combinational Circuit. Proceedings of the XV Iberchip Workshop 2009. 2009. 1. 83-86
AkiraYaguchi, Alberto Palacios Pawlovsky, Akihiro Nikaido. A Study of the Influence of Increasing the Number of Crossover Points in a Genetic Algorithm that Searches for an Input Pair that Cause the Maximum Number of Switching Gates in a Combinational Circuit. Proceedings of the XV Iberchip Workshop 2009. 2009. 1. 107-110
An Ensemble Based on Distances for a kNN Method for Heart Disease Diagnosis
(International Conference on Electronics, Information and Communication (ICEIC 2018) 2018)
A kNN Method that Uses a Non-natural Evolutionary Algorithm for Component Selection
(International Symposium on Computational Intelligence & Applications ISCIA 2017 2017)
Software Tool for the Analysis of Gate Activation in the ISCAS 85 Combinational Circuits
(XXI Iberchip Workshop 2015)
A Multi-parent Genetic Algorithm for Searching for the Pair of Inputs that Cause the Maximum Number of Switching Gates in a Combinational Circuit
(XVI Iberchip Workshop 2010 2010)
A Hybrid SA-GA Method for Finding the Maximum Number of Switching Gates in a Combinational Circuit
(International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2008) 2008)
The Design of a Fast 108-bit DPL (Double Pass transistor Logic) Adder(共著) Hitachi Ltd. , Central Research Laboratory, Technical Report No21917 March 17, 1994
1993 - 1994
Association for Computing Machinery Inc.(ACM)
, 電子情報通信学会
, ペルー工学会(Colegio de Ingenieros del Peru)
, 電気電子技師学会(IEEE)(The Institute of Electrical and Electronics Engineers, Inc)