文献
J-GLOBAL ID:201702237092750773
整理番号:17A0417472
2.5Dトランシーバ積分による3.3A14nm1GHz FPGA【Powered by NICT】
3.3 A 14nm 1GHz FPGA with 2.5D transceiver integration
著者 (18件):
Greenhill David
(Intel, San Jose, CA, United States of America)
,
Ho Ron
(Intel, San Jose, CA, United States of America)
,
Lewis David
(Intel, Toronto, Canada)
,
Schmit Herman
(Intel, San Jose, CA, United States of America)
,
Chan Kok Hong
(Intel, San Jose, CA, United States of America)
,
Tong Andy
(Intel, San Jose, CA, United States of America)
,
Atsatt Sean
(Intel, San Jose, CA, United States of America)
,
How Dana
(Intel, San Jose, CA, United States of America)
,
McElheny Peter
(Intel, San Jose, CA, United States of America)
,
Duwel Keith
(Intel, San Jose, CA, United States of America)
,
Schulz Jeffrey
(Intel, San Jose, CA, United States of America)
,
Faulkner Darren
(Intel, Austin, TX, United States of America)
,
Iyer Gopal
(Intel, San Jose, CA, United States of America)
,
Chen George
(Intel, San Jose, CA, United States of America)
,
Phoon Hee Kong
(Intel, Penang, Malaysia)
,
Lim Han Wooi
(Intel, Penang, Malaysia)
,
Koay Wei-Yee
(Intel, Penang, Malaysia)
,
Garibay Ty
(Intel, Austin, TX, United States of America)
資料名:
IEEE Conference Proceedings
(IEEE Conference Proceedings)
巻:
2017
号:
ISSCC
ページ:
54-55
発行年:
2017年
JST資料番号:
W2441A
資料種別:
会議録 (C)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)