文献
J-GLOBAL ID:201802218295615278
整理番号:18A0160016
Angel目マッピングCNNへの埋込みFPGAのための完全な設計フロー【Powered by NICT】
Angel-Eye: A Complete Design Flow for Mapping CNN Onto Embedded FPGA
著者 (9件):
Guo Kaiyuan
(Department of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology, Tsinghua University, Beijing, China)
,
Sui Lingzhi
(Deephi Technology Company Ltd., Beijing, China)
,
Qiu Jiantao
(Department of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology, Tsinghua University, Beijing, China)
,
Yu Jincheng
(Department of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology, Tsinghua University, Beijing, China)
,
Wang Junbin
(Deephi Technology Company Ltd., Beijing, China)
,
Yao Song
(Deephi Technology Company Ltd., Beijing, China)
,
Han Song
(Department of Electrical Engineering, Concurrent VLSI Architecture group, Stanford University, Stanford, CA, USA)
,
Wang Yu
(Department of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology, Tsinghua University, Beijing, China)
,
Yang Huazhong
(Department of Electronic Engineering, Tsinghua National Laboratory for Information Science and Technology, Tsinghua University, Beijing, China)
資料名:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
(IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems)
巻:
37
号:
1
ページ:
35-47
発行年:
2018年
JST資料番号:
B0142C
ISSN:
0278-0070
CODEN:
ITCSDI
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
アメリカ合衆国 (USA)
言語:
英語 (EN)