文献
J-GLOBAL ID:201802270093533520
整理番号:18A1860091
短絡試験後のV_V強化モードGaN HEMTの故障解析【JST・京大機械翻訳】
Failure analysis of 650 V enhancement mode GaN HEMT after short circuit tests
著者 (5件):
Abbate C.
(DIEI, University of Cassino and Southern Lazio, Via di Biasio, 43, 03043, Cassino, Italy)
,
Busatto G.
(DIEI, University of Cassino and Southern Lazio, Via di Biasio, 43, 03043, Cassino, Italy)
,
Sanseverino A.
(DIEI, University of Cassino and Southern Lazio, Via di Biasio, 43, 03043, Cassino, Italy)
,
Tedesco D.
(DIEI, University of Cassino and Southern Lazio, Via di Biasio, 43, 03043, Cassino, Italy)
,
Velardi F.
(DIEI, University of Cassino and Southern Lazio, Via di Biasio, 43, 03043, Cassino, Italy)
資料名:
Microelectronics Reliability
(Microelectronics Reliability)
巻:
88-90
ページ:
677-683
発行年:
2018年
JST資料番号:
C0530A
ISSN:
0026-2714
資料種別:
逐次刊行物 (A)
記事区分:
原著論文
発行国:
イギリス (GBR)
言語:
英語 (EN)