Rchr
J-GLOBAL ID:200901026698726838
Update date: Sep. 27, 2024
Wakatani Akiyoshi
ワカタニ アキヨシ | Wakatani Akiyoshi
Affiliation and department:
Job title:
Professor
Research field (2):
Information networks
, Computer systems
Research keywords (3):
-Parallel Processing
, 並列処理
, Parallel Processing
Research theme for competitive and other funds (6):
Papers (82):
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若谷彰良. CVRPに対する量子アニーリング方式の決定変数削減. 甲南大学紀要 知能情報学編. 2024. 17. 1. 1-10
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Akiyoshi Wakatani, Toshiyuki Maeda. PROTOTYPE OF A SELF-STUDY WEB APPLICATION SUITE FOR PARALLEL PROGRAMMING EDUCATION. INTED Proceedings. 2024. 1. 261-270
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若谷彰良, 前田利之. 生成AI を用いたC言語プログラミング学習のための助言システムの試作. 甲南大学紀要 知能情報学編. 2024. 16. 2. 7-16
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Akiyoshi Wakatani. Incremental Auto-Tuning for Hybrid Parallelization Using OpenCL. 2023 IEEE 12th International Conference on Intelligent Data Acquisition and Advanced Computing Systems: Technology and Applications (IDAACS). 2023. 2. 5-9
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若谷彰良, 中谷秋栄. 再帰関数を含むアプリケーションに対するOpenCLのハイブリッド並列. 甲南大学紀要 知能情報学編. 2023. 16. 1. 1-6
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MISC (53):
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若谷彰良. メニーコア時代の並列プログラミング. 甲南大学紀要 知能情報学編. 2013. 6. 2. 175-184
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Murakami Akio, Wakatani Akiyoshi. B-006 GPGPU implementation of VQ codebook generation using Aggressive PNN method. 2012. 11. 1. 177-178
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KADOTA Hiroshi, WAKATANI Akiyoshi. A Design of an Adaptive Network on Chip for the Many-core System. IEICE technical report. 2010. 109. 462. 181-186
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KADOTA Hiroshi, WAKATANI Akiyoshi. A Study of Topology-adaptive Network-on-Chip for Many-Core SoC. IEICE technical report. 2009. 109. 198. 85-90
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KADOTA Hiroshi, WAKATANI Akiyoshi. A Proposal of an Adaptive Network on Chip for Multi-Core SoC. IEICE technical report. 2009. 108. 478. 117-122
more...
Books (5):
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Multi-step parallel PNN algorithm for distributed-memory systems
Computer and Information Science,Studies in Computational Intelligence, pp. 41-51, May. 2008 2008 ISBN:3540791868
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Parallelization of VQ Codebook Generation using Lazy PNN Algorithm
Parallel Computing: Software Technology, Algorithms, Architectures & Applications,Editors; G. Joubert et al., Elsevier Science, pp.415-422 2004 ISBN:0444516891
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Parallel Programming Language ADETRAN in "Parallel Language and Compiler Research in Japan"
Kluwer Academic 1995
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Parallel Language and Compiler Research in Japan(共著)
Kluwer Academic publishers 1995
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超並列コンピュータ ADENARTの構成とソフトウエア
工業調査会 1992
Works (1):
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メディア処理用リコンフィギュラブルアーキテクスチャの粒度最適化 電子情報通信学会 リコンフィアギュラブルシステム研究会
Education (2):
- - 1986 Kyoto University Graduate School, Division of Engineering
- - 1984 Kyoto University Faculty of Engineering
Professional career (1):
Work history (12):
- 2008/04/01 - 現在 KONAN UNIVERSITY Faculty of Intelligence and Informatics Professor
- 2020/04/01 - 2021/03/31 KONAN UNIVERSITY Graduate School of Natural Science (Masters Degree Program) Graduate School of Natural Science Deprtment of Intelligent Systems and Informatics (Masters Degree Program)
- 2016/04/01 - 2018/03/31 KONAN UNIVERSITY Faculty of Intelligence and Informatics Faculty of Intelligence and Informatics Department of Intelligence and Informatics
- 2011/04/01 - 2012/03/31 KONAN UNIVERSITY Graduate School of Natural Science (Masters Degree Program) Graduate School of Natural Science Deprtment of Information Science and Systems Engineering (Masters Degree Program)
- 2010/04/01 - 2011/03/31 KONAN UNIVERSITY Faculty of Science and Engineering Faculty of Science and Engineering Department of Information Science and Systems Engineering
- 2008/04/01 - 2010/03/31 KONAN UNIVERSITY Education and Research Center for Information Science Director in General
- 2006/04/01 - 2008/03/31 KONAN UNIVERSITY Faculty of Science and Engineering Faculty of Science and Engineering Department of Information Science and Systems Engineering Professor
- 2006/04/01 - 2008/03/31 KONAN UNIVERSITY Education and Research Center for Information Science
- 2000/04/01 - 2006/03/31 KONAN UNIVERSITY Associate Professor (as old post name)
- 1986/04/01 - 2000/03/31 松下電器産業
- 1986 - 2000 松下電器産業,研究員
- 1986 - 2000 Matsushita Electric Industrial, Researcher
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Association Membership(s) (4):
情報処理学会
, IEEE Computer Society
, IEEE Computer Society (国外)
, 情報処理学会(国内)
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