Omura Yasuhisa

オオムラヤスヒサ | Omura Yasuhisa

Affiliation and department：
Job title： Professor Emeritus
Homepage URL (1)： http://www.device.densi.kansai-u.ac.jp/

Research field (2)： Semiconductors, optical and atomic physics , Electronic devices and equipment

Research keywords (4)： Transport Physics , Solid State Physics , Solid State Physics;Transport Physics , Semiconductor, Silicon, Silicon-on-insulator, Modeling, Simulation, MOSFET, Lubistor

Research theme for competitive and other funds (8)：

2012 - 2017 Basic research on Tunnel FET with Univ. of Calcutta (Prof. A. Mallik)
2012 - 2015 Study on DNA memory device
2004 - 2010 (株)リコー
2000 - 2010 IMEP-INP Grenoble
2006 - 2009 Sony Corp.

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Papers (192)：

Yoshiaki Mori, Shingo Sato, Yasuhisa Omura, Avik Chattopadhyay, Abhijit Mallik. On the definition of threshold voltage for tunnel FETs. SUPERLATTICES AND MICROSTRUCTURES. 2017. 107. 17-27
Rintaro Yamaguchi, Shingo Sato, Yasuhisa Omura. Roles of chemical stoichiometry and hot electrons in realizing the stable resistive transition of sputter-deposited silicon oxide films. JAPANESE JOURNAL OF APPLIED PHYSICS. 2017. 56. 4
Isao Yarita, Shingo Sato, Yasuhisa Omura. Proposal of Physics-Based Equivalent Circuit of Pseudo-MOS Capacitor Structure for Impedance Spectroscopy. IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY. 2016. 4. 4. 169-173
Naoto Matsuo, Tadao Takada, Akira Heya, Kazushige Yamana, Tadashi Sato, Shin Yokoyama, Yasuhisa Omura. Blockade and Staircase Phenomena of Holes in Mesoscopic Scale lambda-Deoxyribonucleic Acid/SiO2/Si Structure. IEEE ELECTRON DEVICE LETTERS. 2016. 37. 2. 224-227
Yoshiaki Mori, Shingo Sato, Yasuhisa Omura, Abhijit Mallik. A Possible Threshold Voltage Definition of Lateral Tunnel FET. 2016 IEEE SILICON NANOELECTRONICS WORKSHOP (SNW). 2016. 188-189

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MISC (51)：

松尾直人, 高田忠雄, 部家彰, 山名一成, 佐藤旦, 横山新, 大村泰久. 招待講演メソスコピック寸法のλ-DNA/SiO2/Si構造における正孔の非クーロンブロケード/ステアケース現象 (有機エレクトロニクス). 電子情報通信学会技術研究報告 = IEICE technical report : 信学技報. 2016. 116. 2. 17-22
Lv Honfei, Sato Shingo, Omura Yasuhisa, MALLIK Abhijit. An Analytical Modeling For Asymmetric Double Gate Tunnel Field Effect Transistor. Technical report of IEICE. SDM. 2014. 114. 291. 1-6
OMURA Yasuhisa, SATO Shingo, MALLIK Abhijit. Physics-based Analytical Model for Gate-on-Germanium Source (GoGeS) TFET. Technical report of IEICE. SDM. 2014. 114. 291. 7-12
OMURA Yasuhisa. Possible Unified Model for the Hooge Parameter in Inversion-Layer-Channel MOSFET. Technical report of IEICE. SDM. 2013. 113. 296. 77-82
Omura Yasuhisa, Sato Daiki, Sato Shingo, Mallik Abhijit. Theoretical Modeling of Double-Gate Lateral Tunnel FET. Technical report of IEICE. SDM. 2013. 113. 296. 55-60

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Books (11)：

SOI Lubistor の物理学と応用
関西大学出版部 2017
MOS Devices for Low-Voltage and Low-Energy Applications
IEEE Press/John Wiley & Sons 2016
SOI Lubistors
IEEE-Wiley&Sons 2013
半導体デバイス工学
オーム社 2012
マルチゲートFinFETのシミュレーション
電子情報通信学会誌,小特集記事 2008

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Lectures and oral presentations (273)：

Impact of Crystalline Orientation on Diffusion Constant of Rectangular Si Nanowire
(Nanosmat Society 2017)
Correlation Characterization of Photoplethysmogram Signals of Pulsation -Potential for Application to Reliable Alcohol-Intake Detection-
(IEEE Computing Conf. 2017 2017)
Key Aspects of Photoplethysmogram Signals for Application to Alcohol-Intake Detection
(IEEE Sensors 2016 2016)
Low-Energy SOI Devices for RF Applications in Sensor Network Era
(Int. Conf. SCI -7 2016)
Impact of Air Exposure on Physical Properties of Sputter-Deposited Undoped ZnO Films
(IEEE IMFEDK 2016 2016)

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Works (4)：

Semiconductor-on-insulator Technology and Related Physics 16
2013 - 2013
Semiconductor-on-insulator Technology and Related Physics 15
Y. Omura, J. Martino, S. Seberherr, J.-P. Raskin, H. Ishii, B.-Y. Ngyen, F. Gamiz 2011 - 2011
Silicon-on-Insulator Technology and Devices 14
Y. Omura, S. Cristoloveanu, F. Gamitz, B.-Y. Ngyen 2009 - 2009
Silicon-on-Insulator Technology and Devices 13
K. Celler, S. Cristoloveanu, S. W. Bedell, F. Gamitz, B.-Y. Nguyen, Y. Omura 2007 - 2007

Professional career (1)：

Doctor of Engineering

Committee career (10)：

2017/01/31 - Professional Member
2017/01/31 - Nanosmat Society Professional Member
2009/01/01 - 2010/12/31 Chair of Kansai Chapter
2009/01/01 - 2010/12/31 Chair of Kansai Chapter
2008/10/01 - Leading Organaizer of Int. Symp. on SOI Tech. and Dev.

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Awards (4)：

2018/01/01 - IEEE IEEE Life Fellow
2010/01/01 - IEEE IEEE Fellow
1983/10/23 - 日本電信電話公社昭和58年度研究開発本部長記念盾
1983/04/03 - 電子通信学会電子通信学会学術奨励賞

Association Membership(s) (6)：

The Institute of Electrical and Electronics Engineers , The Electrochemical Society , International Workshiop on Low Temperature Electronics , Japan Society of Applied Physics , The Institute of EIC , Nanosmat Society

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