Rchr
J-GLOBAL ID:201801020476108992
Update date: Oct. 22, 2024
Fukuhara Masaaki
フクハラ マサアキ | Fukuhara Masaaki
Affiliation and department:
Job title:
associate professor
Research field (2):
Computer systems
, Electronic devices and equipment
Research keywords (12):
Variable Logic Circuit (VLC)
, Field Programmable Gate Array
, CAM with Hamming distance search function
, Electric Circuit
, Electronic Circuit
, Integrated Circuit
, CAM
, Content Addressable Memory
, Associative Memory
, neuron CMOS inverter
, neuron MOS inverter
, neuron MOS transistor
Research theme for competitive and other funds (1):
- 2022 - 2025 A Study on a Low Power Variable Logic Circuit Using Neuron CMOS Inverters
Papers (45):
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Daishi Nishiguchi, Mitsutoshi Yahara, Yujiro Harada, Masaaki Fukuhara, Kuniaki Fujimoto. DESIGN OF FREQUENCY MULTIPLIER BASED ON DOUBLE-EDGE COUNTER AND ITS ANALYSIS. ICIC Express Letters, Part B: Applications. 2024. 15. 1. 35-42
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Daishi NISHIGUCHI, Masaaki FUKUHARA, Mitsutoshi YAHARA, Kuniaki FUJIMOTO. Proposal of a high-speed Hamming distance detector using electronic neuron circuit and chip evaluation. PROCEEDINGS OF THE SCHOOL OF INFORMATION AND TELECOMMUNICATION ENGINEERING, TOKAI UNIVERSITY. 2023. 15. 2. 7-10
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Natchanai Roongmuanpha, Nutcha Likhitkitwoerakul, Masaaki Fukuhara, Worapong Tangsrirat. Single VDGA-Based Mixed-Mode Electronically Tunable First-Order Universal Filter. Sensors. 2023. 23. 5. 2759-2759
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Mitsutoshi Yahara, Kuniaki Fujimoto, Daishi Nishiguchi, Yujiro Harada, Masaaki Fukuhara. Digital Frequency-Locked Loop with Wide Lock-in Range and Low Frequency Error Based on Multi-Phase Clock. International Journal of Innovative Computing, Information and Control (IJICIC). 2022. 18. 6. 1979-1988
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Hayato Yagi, Daishi Nishiguchi, Kaiki Yamada, Ryo Yamamoto, Masaaki Fukuhara. Capacitances Design Method of the Main Neuron CMOS Inverter of a 4-Input Variable Logic Circuit with FG Calibration. ICIC Express Letters. 2022. 16. 7. 741-748
more...
MISC (2):
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西口大嗣, 矢原充敏, 原田裕二郎, 福原雅朗, 藤本邦昭. A Range Hamming Distance Search Associative Memory Based on Electronic Neurons Using Interconnect Capacitance. 電子情報通信学会論文誌 C(Web). 2024. J107-C. 4
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西口大嗣, 矢原充敏, 原田裕二郎, 福原雅朗, 藤本邦昭. A Proposal of PLL Using Digital Controlled Oscillator Based on Multi-Phase Clock. 電子情報通信学会論文誌 C(Web). 2024. J107-C. 4
Lectures and oral presentations (13):
-
ISS-A-029チャージシェア型SRAMを用いたハミング距離検索機能付きCAMの回路構成と消費電力の一検討
(2023 IEICE General Conference 2023)
-
(32)Prototype and evaluation of 4-input variable logic circuit with FGC using neuron CMOS inverter
(Design Gaia 2022 -New Field of VLSI Design- 2022)
-
A Study of Through Current of Hamming Distance Detector Using Clocked Neuron CMOS Inverter
(電気学会電子・情報・システム部門大会講演論文集(CD-ROM) 2018)
-
A study of power consumption of a Hamming Distance Search CAROM Based on a Symmetric NOR-Architecture
(電気学会電子・情報・システム部門大会講演論文集(CD-ROM) 2017)
-
フラッシュCMOS A/Dコンバータを用いたハミング距離検索機能付きCAMの一検討
(電気学会電子・情報・システム部門大会講演論文集(CD-ROM) 2014)
more...
Education (3):
- 2004 - 2007 Tokai University Graduate School of Engineering
- 2002 - 2004 Tokai University
- 1998 - 2002 Tokai University School of Engineering
Professional career (1):
Work history (7):
Committee career (4):
- 2022/04 - 2023/03 The 16th International Conference on Innovative Computing, Information and Control (ICICIC2022) a member of Program & Steering Committee, ICICIC2022
- 2018/11 - 高校生ものづくりコンテスト全国大会(東海大会) 電子回路組立部門(2018年11月17-18日@静岡県立科学技術高等学校) 審査員
- 2017/08 - 高校生ものづくりコンテスト東海大会 電子回路組立部門(2017年8月22日@静岡県立浜松城北工業高等学校) 審査員
- 2017/03 - 一般社団法人電子情報通信学会東京支部 H28年度研究発表会(2017年3月4日@東海大学高輪校舎) 審査員
Association Membership(s) (2):
THE INSTITUTE OF ELECTRICAL ENGINEERS OF JAPAN
, THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS
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