Rchr
J-GLOBAL ID:200901008908207342
Update date: Nov. 12, 2024
Takahashi Atsushi
タカハシ アツシ | Takahashi Atsushi
Affiliation and department:
Job title:
Professor
Research field (1):
Computer systems
Research theme for competitive and other funds (7):
- 2013 - 2016 Physical Design Technology Development for Advanced Lithography
- 2009 - 2012 On Establishment of General Synchronous Circuit Design Methodology to Enhance Delay Variation Robustness
- 2006 - 2007 Aconstruction of a routing synthesis system for VLSI packages
- 2001 - 2002 準同期式プロセッサの試作
- 1997 - 1998 準同期式回路レイアウト設計
- 1995 - 1995 VLSI自動設計における配置配線階層の統合に関する研究
- 1993 - 1995 Development of Delay Performance Driven Logic Circuit Design System
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Papers (101):
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Hiroyoshi Tanabe, Atsushi Takahashi. Data augmentation in extreme ultraviolet lithography simulation using convolutional neural network. JOURNAL OF MICRO-NANOPATTERNING MATERIALS AND METROLOGY-JM3. 2022. 21. 4
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Hiroyoshi Tanabe, Atsushi Takahashi. Data augmentation in EUV lithography simulation based on convolutional neural network. DTCO AND COMPUTATIONAL PATTERNING. 2022. 12052
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Hiroyoshi Tanabe, Shimpei Sato, Atsushi Takahashi. Fast EUV lithography simulation using convolutional neural network. JOURNAL OF MICRO-NANOPATTERNING MATERIALS AND METROLOGY-JM3. 2021. 20. 4
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UKON Yuta, SATO Shimpei, TAKAHASHI Atsushi. Design Method of Variable-Latency Circuit with Tunable Approximate Completion-Detection Mechanism. IEICE Transactions on Electronics. 2021. E104.C. 7. 309-318
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Hiroyoshi Tanabe, Shimpei Sato, Atsushi Takahashi. Fast 3D lithography simulation by convolutional neural network. DESIGN-PROCESS-TECHNOLOGY CO-OPTIMIZATION XV. 2021. 11614
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MISC (43):
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Atsushi Takahashi. Report on the 28th Asia and South Pacific Design Automation Conference. IEEE Design & Test. 2023. 40. 3. 62-63
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Proceedings of the 28th Asia and South Pacific Design Automation Conference. 2023
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Atsushi Takahashi. Message from the Editor-in-Chief. IPSJ Transactions on System and LSI Design Methodology. 2023. 16. 1-1
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Atsushi Takahashi. Message from the Editor-in-Chief. IPSJ Transactions on System LSI Design Methodology. 2022. 15. 1-1
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Atsushi Takahashi. Message from the Editor-in-Chief. IPSJ Transactions on System LSI Design Methodology. 2021. 14. 1-1
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Books (3):
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情報基礎数学
オーム社 2014 ISBN:9784274216107
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情報基礎数学
昭晃堂 2007 ISBN:9784785631604
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情報とアルゴリズム (電子情報通信工学シリーズ)
森北出版 2005 ISBN:4627702515
Lectures and oral presentations (26):
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Minimization of Delay Insertion in Clock Period Improvement in General-Synchronous Framework
(2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUITS AND SYSTEMS 2008)
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Routability Driven Modification Method of Monotonic Via Assignment for 2-layer Ball Grid Array Packages
(Asia and South Pacific Design Automation Conference 2008(ASP-DAC 2008) 2008)
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ILP-Based Optimizaton of Time-Multiplexed I/O Assignment for Multi-FPGA Systems
(The2008 IEEE International Symposium on Circuits and Systems(ISCAS 2008) 2008)
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A Semi-Monotonic Routing Method for Fanin Type Ball Grid Array Packages
(2008 IEEE ASIA PACIFIC CONFERENCE ON CIRCUIT AND SYSTEMS 2008)
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統計的静的遅延解析における回路の指定歩留まりを達成する最大値見積もり手法
(DAシンポジウム2008 2008)
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Works (7):
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VLSIパッケージのための配線自動合成システムの構築
2006 - 2007
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準同期式プロセッサの試作
2001 - 2002
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準同期回路合成技術に関する研究
2001 - 2001
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準同期式回路の低電力指向レイアウト技術に関する研究
1998 - 1999
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準同期式回路レイアウト設計
1997 - 1998
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Education (2):
- 1989 - 1991 Tokyo Institute of Technology Graduate School of Science and Engineering
- 1985 - 1989 Tokyo Institute of Technology School of Engineering
Professional career (1):
Work history (9):
- 2016/04 - 現在 Tokyo Institute of Technology School of Engineering, Department of Information and Communications Engineering Professor
- 2015/02 - 2016/03 Tokyo Institute of Technology Graduate School of Science and Engineering Department of Communications and Computer Engineering Professor
- 2013/04 - 2015/01 Tokyo Institute of Technology Graduate School of Science and Engineering Department of Communications and Computer Engineering Associate Professor
- 2012/04 - 2013/03 Tokyo Institute of Technology Graduate School of Science and Engineering Associate Professor
- 2009/04 - 2012/03 Osaka University Graduate School of Engineering Division of Electrical, Electronic and Information Engineering Associate Professor
- 2007/04 - 2009/03 Tokyo Institute of Technology Graduate School of Science and Engineering, Department of Communications and Integrated Systems Associate Professor
- 2000/04 - 2007/03 Tokyo Institute of Technology Graduate School of Science and Engineering, Department of Communications and Integrated Systems Associate Professor
- 1997/11 - 2000/03 Tokyo Institute of Technology Faculty of Engineering Associate Professor
- 1991/04 - 1997/10 Tokyo Institute of Technology Faculty of Engineering Research Associate
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Committee career (11):
- 2019/04 - 2023/03 IPSJ (Information Processing Society of Japan) Transactions on System-LSI Design Methodologies Editor-in-Chief
- 2021/05 - 2022/04 電子情報通信学会 基礎・境界ソサイエティ 会長
- 2020/05 - 2021/04 電子情報通信学会 基礎・境界ソサイエティ 次期会長
- 2020 - 2021 IEEE Circuits and Systems Society (CASS) Japan Joint Chapter Chair
- 2017/05 - 2019/04 電子情報通信学会 基礎・境界ソサイエティ ソサイエティ誌編集委員長
- 2015 - 2019 IEEE Circuits and Systems Society (CASS) Board of Governors (BoG)
- 2015/05 - 2016/04 電子情報通信学会 基礎・境界ソサイエティ 副会長(システムと信号処理)
- 2014 - 2016 IEEE Council on Electronic Design Automation (CEDA) All Japan Joint Chapter Chair
- 2009/05 - 2010/04 電子情報通信学会 VLSI設計技術研究会 委員長
- 2004 - 2005 電子情報通信学会 査読委員、事業担当幹事、VLSI設計技術研究専門委員会 専門委員、和文論文誌A 編集委員、VLSI設計技術研究専門委員会 幹事 、査読委員
- 2001 - 2005 情報処理学会 システムLSI設計技術研究運営委員会 運営委員、設計自動化研究会 連絡委員
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Awards (5):
- 2005 - Tokyo Tech Award for Challenging Research
- 2001 - IEEE Solid-State Circuits Society Japan Chapter 奨励賞
- 2001 - 第3回LSI IPデザイン・アワード IP賞
- 1998 - 平成9年度電子情報通信学会学術奨励賞
- 1992 - 第4回回路とシステム軽井沢ワークショップ奨励賞
Association Membership(s) (4):
IEEE
, 情報処理学会
, 電子情報通信学会
, ACM
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