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J-GLOBAL ID：200901050755442211   Update date: Mar. 09, 2026

Inoue Koji

イノウエ コウジ | Inoue Koji
Affiliation and department：
九州大学 大学院システム情報科学研究院

About 九州大学 大学院システム情報科学研究院


Job title： 教授
Homepage URL  (1)： http://vasily00.tl.fukuoka-u.ac.jp/~inoue
Research field  (1)： Control and systems engineering
Research theme for competitive and other funds  (27)：
  • 2022 - 2027 Creation and development of superconducting computing technology for post-Moore era
  • 2022 - 2026 ポストムーア時代を見据えた超伝導コンピューティング技術の創成と展開
  • 2020 - 2025 超伝導量子回路の集積化技術の開発
  • 2021 - 2024 情報通信技術の研究開発
  • 2018 - 2022 低炭素AI処理基盤のための革新的超伝導コンピューティング
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Papers (154)：
  • Pratiksha Mundhe, Yuta Hano, Satoshi Kawakami, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, Ilkwon Byun. Approximate SFQ-Based Computing Architecture Modeling With Device-Level Guidelines. IEEE COMPUTER ARCHITECTURE LETTERS. 2025. 24. 2. 253-256
  • Pratiksha Mundhe, Yuta Hano, Satoshi Kawakami, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, Ilkwon Byun. Approximate SFQ-Based Computing Architecture Modeling With Device-Level Guidelines. IEEE Comput. Archit. Lett. 2025. 24. 2. 253-256
  • Takumi Inaba, Takatsugu Ono, Koji Inoue, Satoshi Kawakami. Design and Implementation of Opto-Electrical Hybrid Floating-Point Multipliers. IEICE Trans. Inf. Syst. 2025. 108. 1. 2-11
  • Zhengpan Fei, Mingchuan Lyu, Satoshi Kawakami, Koji Inoue. Data-Pattern-Driven LUT for Efficient In-Cache Computing in CNNs Acceleration. IEEE Comput. Archit. Lett. 2025. 24. 1. 81-84
  • Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura. C3-VQA: Cryogenic Counter-Based Coprocessor for Variational Quantum Algorithms. IEEE Transactions on Quantum Engineering. 2025. 6. 1-17
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MISC (144)：
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Books (1)：
  • Low-Power Electronics Design (Low-Power Cache Design: Chap. 25)
    CRC PRESS 2004
Lectures and oral presentations  (75)：
  • How many trials do we need for reliable NISQ computing?
    (The First International Workshop on Quantum Computing: Circuits Systems Automation and Applications 2020)
  • Practical error modeling toward realistic NISQ simulation
    (The First International Workshop on Quantum Computing: Circuits Systems Automation and Applications 2020)
  • 32 GHz 6.5 mW Gate-Level-Pipelined 4-bit Processor using Superconductor Single-Flux-Quantum Logic
    (2020 Symposia on VLSI Technology and Circuits 2020)
  • Enhancing a manycore-oriented compressed cache for GPGPU
    (International Conference on High Performance Computing in Asia-Pacific Region 2020)
  • Energy Efficient Runahead Execution on a Tightly Coupled Heterogeneous Core
    (International Conference on High Performance Computing in Asia-Pacific Region 2020)
ｍore...
Education (4)：
  • - 1996 Kyushu Institute of Technology
  • - 1996 Kyushu Institute of Technology Graduate School, Division of Information Engineering
  • - 1994 Kyushu Institute of Technology School of Computer Science and Systems Engineering Department of Artificial Intelligence
  • - 1994 Kyushu Institute of Technology Faculty of Computer Science and Systems Engineering
Professional career (2)：
  • (BLANK) (Kyushu Institute of Technology)
  • (BLANK) (Kyushu University)
Committee career (11)：
  • 2018/03 - 2022/03 情報処理学会システムアーキテクチャ研究会 主査
  • 2019/04 - 2021/03 九州大学 情報通信委員会委員長
  • 2019/04 - 2021/03 九州大学 システムLSI研究センター長
  • 2017/04 - 2019/03 九州大学 EJUST連携センター長
  • 2015/04 - 2017/03 九州大学 EJUST連携センター副センター長
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Awards (7)：
  • 2017/08 - IEEE The 23rd International Symposium on Low Power Electronics and Design (ISLPED) Design Contest Award Honorable Mention
  • 2011/01 - 2011年ハイパフォーマンスコンピューティングと計算科学シンポジウム 最優秀論文賞
  • 2008/04 - 文部科学省 平成20年度科学技術分野の文部科学大臣表彰 若手科学者賞
  • 2003/01 - 第15回 回路とシステム(軽井沢)ワークショップ 奨励賞
  • 2002/01 - 第4回 LSI IPデザイン・アワード チャレンジ賞
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Association Membership(s) (4)：
ACM ,  IEEE ,  情報処理学会 ,  電子情報通信学会
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