Research field (5)：
Communication and network engineering
, Electronic devices and equipment
, Information networks
, Computer systems
, Information theory
Research keywords (2)：
計算機アーキテクチャ
, Computer Architecture
Research theme for competitive and other funds (6)：
省電力セルフタイム型LSIシステムの構成法に関する研究
省電力データ駆動型超並列プロセッサの各種応用に関する研究
データ駆動型ネットワークプロセッサ
セルフタイム回路による省電力SoCシステム
「VLSIコンピュータの情報家電機器への応用」
「超並列・極省電力コンピュータ:データ駆動型マルチプロセッサ」
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Papers (30)：
Senri Yoshikawa, Shuji Sannomiya, Makoto Iwata, Akira Sato, Hiroaki Nishikawa. EDA-oriented FPGA Circuit Design Method for Four-phase Bundled-data Circular Self-timed Pipeline. Journal of Information Processing. 2023. 31. 495-508
岩田誠, 宮城桂, 三宮秀次, 西川博昭. A Study on Low-Powered Self-Timed Pipeline Circuit. 高知工科大学紀要. 2013. Vol.10. 1. 95-102
Lectures and oral presentations (61)：
Multi-layered information management system for IoT-based P2P applications
(Proceedings of the 24th International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA18) 2018)
Data-Driven Sensor Networking Processor Tolerating Instantaneously Excessive Load
(Proceedings of the 2016 International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA’16) 2016)
ASIC implementation of multimode frequency domain equalizer for heterogeneous wireless system.
(24th IEEE Annual International Symposium on Personal, Indoor, and Mobile Radio Communications, PIMRC 2013, London, United Kingdom, September 8-11, 2013 2013)
Low-Powered Self-Timed Pipeline with Variable-Grain Power Gating and Suspend-Free Voltage Scaling
(Proceedings of the 2013 International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA’13) 2013)
An Implementation of Platform Simulator for Congestion-Free Ultra-Low-Power Data-Driven Networking System
(Proceedings of the 2013 International Conference on Parallel and Distributed Processing Techniques and Applications(PDPTA’13) 2013)
