柳澤 秀明. Design of a Low Power Processor for a Surveillance System Using an FPGA. In proc. of The 18th IEEE Real-Time and Embedded Technology and Applications Symposium Work-in-Progress (WiP). 2012
YANAGISAWA Hideaki, UEHARA Minoru, MORI Hideki. Constructing Test Environment for Processors Development Environment. IPSJ SIG Notes. 2006. 2006. 96. 91-96
Yanagisawa Hideaki, Uehara Minoru, Mori Hideki. Constructing Test Environment for Processors Development Environment. IPSJ SIG Notes. 2006. 2006. 96. 91-96
Yanagisawa Hideaki, Matsumoto Katsuyoshi, Uehara Minoru, Mori Hideki. L_035 Web-based Collaborative Processors Development Environment. 2006. 5. 4. 85-88
Design of CPU based on language level. 1999. 59. 1-2
YANAGISAWA Hideaki, MORI Hideki, UEHARA Minoru. Design of CPU based on language level. IPSJ SIG Notes. 1999. 1999. 67. 55-60
Books (1):
Web-Based Collaborative Development Environment for an ISA Simulator
World Scientific Publishing, Proceedings of the 4th International Conference (CIC 2006), 187 pages 2008
Professional career (1):
Dr.Eng.
Work history (3):
2011/04 - 現在 Tokuyama College of Technology Associate Professor
2007/04 - 2011/03 Tokuyama College of Technology Assistant Professor
2006/09 - 2007/03 Tokuyama College of Technology Research Associate
Committee career (5):
2021/10 - 現在 周南市スマートシティ推進協議会 委員
2021/06 - 現在 論文誌JIP編集委員会 編集委員
2020 - 現在 Sustainable Computing Systems Workshop Program Committee
2017/04 - 現在 情報処理学会,論文誌「ネットワークサービスと分散処理」特集号 編集委員
2016/04 - 2020/03 情報処理学会 マルチメディア通信と分散処理研究会 運営委員
Association Membership(s) (4):
ACM
, IEEE-CS
, THE INSTITUTE OF ELECTRONICS, INFORMATION AND COMMUNICATION ENGINEERS
, INFORMATION PROCESSING SOCIETY OF JAPAN