Art
J-GLOBAL ID:200902001375973926   Reference number:90A0741239

A hypothetical reasoning system with constraint handling mechanism and its application to the design of circuit blocks.

制約評価機構付き仮説推論システムとその回路ブロック設計への応用
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Volume:Issue:Page: 640-648  Publication year: Sep. 1990 
JST Material Number: X0330A  ISSN: 0912-8085  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Artificial intelligence  ,  Electronic circuits in general 
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