Art
J-GLOBAL ID：200902015729979758
Reference number：88A0147151
Synthesis of self-timed VLSI circuits from graph-theoretic specifications.
グラフ理論的仕様による自己タイミングVLSI回路の合成
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Author (1)：
Material：
Volume：
1987
Page：
220-223
Publication year：
1987
JST Material Number：
D0858B
ISSN：
1063-6404
Document type：
Proceedings
Article type：
原著論文
Country of issue：
United States (USA)
Language：
ENGLISH (EN)
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