Art
J-GLOBAL ID：200902026880859766   Reference number：86A0317681

Model for delay faults based upon paths.

パスに基づく遅延故障モデル
Author (1)：
SMITH G L

About SMITH G L

(International Business Machines Corp., NY)

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Material：
Proceedings. International Test Conference  (Proc Int Test Conf)

About Proceedings. International Test Conference


Volume： 1985  Page： 342-349  Publication year： 1985 
JST Material Number： E0211B  ISSN： 1089-3539  Document type： Proceedings
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)
Thesaurus term：
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combinational circuit

About combinational circuit

,...
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JST classification (1)：
JST classification
Category name(code) classified by JST.
Logic circuits 
(NC05070B)

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Terms in the title (3)：
Terms in the title
Keywords automatically extracted from the title.
パス

About パス

, 
遅延

About 遅延

, 
故障モデル

About 故障モデル


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