Art
J-GLOBAL ID：200902066007689520   Reference number：92A0625418

Adjustable Block Size Coherent Caches.

ブロックサイズが調整可能なコヒーレントキャッシュ
Author (2)：
DUBNICKI C

About DUBNICKI C

(Univ. Rochester, New York)

About Univ. Rochester, New York

, 
LEBLANC T J

About LEBLANC T J

(Univ. Rochester, New York)

About Univ. Rochester, New York


Material：
Proceedings. Annual International Symposium on Computer Architecture  (ACM/IEEE Annual International Symposium on Computer Architecture)

About Proceedings. Annual International Symposium on Computer Architecture


Volume： 19th  Page： 170-180  Publication year： 1992 
JST Material Number： C0446B  ISSN： 1063-6897  Document type： Proceedings
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)
Thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
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computer architecture

About computer architecture

,...
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JST classification (2)：
JST classification
Category name(code) classified by JST.
Control systems 
(JC02030K)

About Control systems

,  Memory systems 
(JC02040V)

About Memory systems

Terms in the title (2)：
Terms in the title
Keywords automatically extracted from the title.
ブロックサイズ

About ブロックサイズ

, 
コヒーレントキャッシュ

About コヒーレントキャッシュ


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