A Low Power Dissipation Architecture of High-Performance Multi-Processor for State-Space Digital Filters Using Block-State Realization.

TSUNEKAWA YOSHITAKA; IWAWAKI MICHIRU; MIURA MAMORU

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J-GLOBAL ID：200902101980642782 Reference number：99A0181018

A Low Power Dissipation Architecture of High-Performance Multi-Processor for State-Space Digital Filters Using Block-State Realization.

ブロック状態実現を用いた状態空間ディジタルフィルタ用高性能マルチプロセッサの低消費電力形アーキテクチャ

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Material：
Volume： J81-A Issue： 12 Page： 1739-1749 Publication year： Dec. 1998
JST Material Number： S0621A ISSN： 0913-5707 Document type： Article
Article type：原著論文 Country of issue： Japan (JPN) Language： JAPANESE (JA)

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Digital filter

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