Art
J-GLOBAL ID:200902113851209680
Reference number:95A0192740
A New Analytical/Iterative Approach to Statistical Delay Characterization of CMOS Digital Combinational Circuits.
CMOSディジタル組合せ回路の統計遅れ特性に対する新しい解析的/反復的方法
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Author (2):
,
Material:
Volume:
23
Issue:
1
Page:
23-47
Publication year:
Jan. 1995
JST Material Number:
H0341B
ISSN:
0098-9886
CODEN:
ICTACV
Document type:
Article
Article type:
原著論文
Country of issue:
United States (USA)
Language:
ENGLISH (EN)
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JST classification (2):
JST classification
Category name(code) classified by JST.
Semiconductor integrated circuit
, Logic circuits
Terms in the title (7):
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