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J-GLOBAL ID：200902118820567946
Reference number：02A0271154
Accelerating intellectual property design flow using Simulink for system on a programmable chip.
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Author (1)：
Material：
Volume：
35th
Issue：
Vol.1
Page：
454-457
Publication year：
2001
JST Material Number：
D0709A
ISSN：
1058-6393
Document type：
Proceedings
Country of issue：
United States (USA)
Language：
ENGLISH (EN)
Terms in the title (3)：
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