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J-GLOBAL ID：200902138995584470   Reference number：96A0016256

IPUS: an architecture for the integrated processing and understanding of signals.

IPUS 信号の処理と理解の統合のためのアーキテクチャ
Author (3)：
LESSER V R

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(Univ. Massachusetts, MA, USA)

About Univ. Massachusetts, MA, USA

, 
NAWAB S H

About NAWAB S H

(Boston Univ., MA, USA)

About Boston Univ., MA, USA

, 
KLASSNER F I

About KLASSNER F I

(Univ. Massachusetts, MA, USA)

About Univ. Massachusetts, MA, USA


Material：
Artificial Intelligence  (Artif Intell)

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Volume： 77  Issue： 1  Page： 129-171  Publication year： Aug. 1995 
JST Material Number： E0180C  ISSN： 0004-3702  Document type： Article
Article type： 原著論文  Country of issue： Netherlands (NLD)  Language： ENGLISH (EN)
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Artificial intelligence 
(JE08000Z)

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理解

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, 
統合

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, 
アーキテクチャ

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