Art
J-GLOBAL ID：200902140586186246   Reference number：00A0078115

Reduction of power consumption of RSFQ circuits by inductance-load biasing.

インダクタンス負荷バイアス法によるRSFQ回路の消費電力の軽減
Author (2)：
YOSHIKAWA N

About YOSHIKAWA N

(Yokohama National Univ., Yokohama, JPN)

About Yokohama National Univ., Yokohama, JPN

, 
KATO Y

About KATO Y

(Yokohama National Univ., Yokohama, JPN)

About Yokohama National Univ., Yokohama, JPN


Material：
Superconductor Science and Technology  (Supercond Sci Technol)

About Superconductor Science and Technology


Volume： 12  Issue： 11  Page： 918-920  Publication year： Nov. 1999 
JST Material Number： T0607A  ISSN： 0953-2048  CODEN： SUSTEF  Document type： Article
Article type： 原著論文  Country of issue： United Kingdom (GBR)  Language： ENGLISH (EN)
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*superconducting device

About superconducting device

,...
Semi thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
single flux quantum

About single flux quantum


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JST classification (2)：
JST classification
Category name(code) classified by JST.
Josephson junction and elements 
(BM04043E)

About Josephson junction and elements

,  Logic circuits 
(NC05070B)

About Logic circuits

Terms in the title (3)：
Terms in the title
Keywords automatically extracted from the title.
インダクタンス

About インダクタンス

, 
RSFQ

About RSFQ

, 
消費電力

About 消費電力


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