Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits.

FUKUMOTO Y; TAKAHATA Y; WADA O; TOYOTA Y; MIYASHITA T; KOGA R

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J-GLOBAL ID：200902149289807956 Reference number：01A1064711

Power Current Model of LSI/IC Containing Equivalent Internal Impedance for EMI Analysis of Digital Circuits.

ディジタル回路のEMI解析のための等価内部インピーダンスを含むLSI・IC電力流モデル

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Material：
Volume： E84-B Issue： 11 Page： 3041-3049 Publication year： Nov. 01, 2001
JST Material Number： L1369A ISSN： 0916-8516 Document type： Article
Article type：原著論文 Country of issue： Japan (JPN) Language： ENGLISH (EN)

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Semiconductor integrated circuit , Noise in general

Reference (12)：

HUBING, T. Power bus noise reduction using power islands in printed circuit board designs. 1999 Int. Symp. on EMC. 1999, 1-4
http://www.eia.org/eig/ibis/ibis.htm
FUKUMOTO, Y. A design method of decoupling circuits for a digital PCB to reduce high frequency current on power and ground planes. 1999 Int. Symp. on EMC. 1999, 9-12
YOSHIDA, S. Novel decoupling circuit enabling notable electromagnetic noise suppression and high-density packaging in a digital printed circuit board. Proc. IEEE International Symposium on EMC. 1998, 641-646
KOGA, R. Power decoupling circuit for modeling and measurement of EMC characteristics of IC/LSI. Second Asia-Pasific Conference on Environmental Electoromagnetics (CEEM'2000). 2000, 444-448

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