Art

J-GLOBAL ID：200902151518135708   Reference number：01A0234446

An Evaluation of a Data Preload Mechanism for a Linked List Structure.

連結リスト構造を対象としたデータプリロード方式の評価

Author (5)： YAMAMURA SHUJI (京都工繊大 工芸) ,  KADOTA TADAFUMI (京都工繊大 工芸) ,  HIRATA HIROAKI (京都工繊大 工芸) ,  NIIMI HARUO (京都産大 工) ,  SHIBAYAMA KIYOSHI (京都工繊大 工芸)
Material： 電子情報通信学会論文誌 D-1  (IEICE Transactions on Information and Systems, Pt.1 (Japanese Edition))
Volume： J84-D-1  Issue： 2  Page： 136-145  Publication year： Feb. 01, 2001 
JST Material Number： S0757B  ISSN： 0915-1915  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： JAPANESE (JA)

Thesaurus term： *instruction control ,...
Semi thesaurus term： データプリロード ,...

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JST classification (1)： Control systems  (JC02030K)

Reference (9)：

• LIPASTI, M. H. Value locality and load value prediction. Proc. 7th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems. 1996, 138-147
• EICKEMEYER, R. J. A load-instruction unit for pipelined processors. IBM J. Res. Dev. 1993, 37, 4, 547-564
• AUSTIN, T. M. Zero-cycle loads : Microarchitecture support for reducing load latency. Proc. 28th Annual Int'l Symp. on Microarchitecture. 1995, 82-92
• CHEN, T. Effective hardware-based data prefetching for high-performance processors. IEEE Trans. Comput. 1995, 44, 5, 609-623
• ROTH, A. Dependence based prefetching for linked data structures. Proc. 8th Int'l Conf. on Architectural Support for Programming Languages and Operating Systems. 1998, 115-126

Terms in the title (3)： リスト ,  プリロード ,  評価