Art

J-GLOBAL ID：200902159942020660   Reference number：99A0885226

Integrated Electronics and New System Paradigms. Multiple-Valued Inverter Using a Single-Electron-Tunneling Circuit.

単一電子トンネリング回路を用いた多値インバータ

Author (4)： AKAZAWA M (Hokkaido Univ., Sapporo-shi, JPN) ,  KANAAMI K (Hokkaido Univ., Sapporo-shi, JPN) ,  YAMADA T (Hokkaido Univ., Sapporo-shi, JPN) ,  AMEMIYA Y (Hokkaido Univ., Sapporo-shi, JPN)
Material： IEICE Transactions on Electronics (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Electron (Inst Electron Inf Commun Eng))
Volume： E82-C  Issue： 9  Page： 1607-1614  Publication year： Sep. 25, 1999 
JST Material Number： L1370A  ISSN： 0916-8524  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： single electron tunnel effect ,...

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JST classification (2)： Semiconductor integrated circuit  (NC03162T) ,  Logic circuits  (NC05070B)

Reference (8)：

• GRABERT, H. Single Charge Tunneling Coulomb Blockade Phenomena in Nanostructures. 1992
• HIGUCHI, T. Multiple-Valued Digital Processing Systems. 1989
• HANYU, T. Prospects of multiple-valued VLSI processors. IEICE Trans. Electron. 1993, E79-C, 3, 383-392
• MCAULEY, A. J. Four state asynchronous architectures. IEEE Trans. Comput. 1992, 41, 2, 129-142
• TUCKER, J. R. Complementary digital logic based on the 'Coulomb blockade'. J. Appl. Phys. 1992, 72, 4399-4413

Terms in the title (3)： 電子トンネリング ,  多値 ,  インバータ