Art
J-GLOBAL ID：200902167867839805   Reference number：97A0645730

Individual Flip-Flops with Gated Clocks for Low Power Datapaths.

低電力データパス用のゲート付きクロックを有する個別フリップフロップ
Author (3)：
LANG T

About LANG T

(Univ. California, CA, USA)

About Univ. California, CA, USA

, 
MUSOLL E

About MUSOLL E

(Univ. Polit<span style=text-decoration:overline>e`</span>cnica de Catalunya, Barcelona, ESP)

About Univ. Polit<span style=text-decoration:overline>e`</span>cnica de Catalunya, Barcelona, ESP

, 
CORTADELLA J

About CORTADELLA J

(Univ. Polit<span style=text-decoration:overline>e`</span>cnica de Catalunya, Barcelona, ESP)

About Univ. Polit<span style=text-decoration:overline>e`</span>cnica de Catalunya, Barcelona, ESP


Material：
IEEE Transactions on Circuits and Systems 2: Analog and Digital Signal Processing  (IEEE Trans Circuits Syst 2)

About IEEE Transactions on Circuits and Systems 2: Analog and Digital Signal Processing


Volume： 44  Issue： 6  Page： 507-516  Publication year： Jun. 1997 
JST Material Number： W0347A  CODEN： ICSPE5  Document type： Article
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)
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multivibrator

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,...
Semi thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
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flip-flop circuit

About flip-flop circuit


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JST classification (1)：
JST classification
Category name(code) classified by JST.
Oscillation circuits 
(NC05020Y)

About Oscillation circuits

Terms in the title (5)：
Terms in the title
Keywords automatically extracted from the title.
低電力

About 低電力

, 
データパス

About データパス

, 
ゲート

About ゲート

, 
クロック

About クロック

, 
フリップフロップ

About フリップフロップ


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