Art

J-GLOBAL ID：200902174394302341   Reference number：98A0861455

Full Copper Wiring in a Sub-0.25μm CMOS ULSI Technology.

サブ0.25μm CMOS ULSI技術における完全な銅配線

Author (9)： EDELSTEIN D (IBM Semiconductor Res. and Dev. Center, NY) ,  GOLDBLATT R (IBM Semiconductor Res. and Dev. Center, NY) ,  COTE W (IBM Semiconductor Res. and Dev. Center, NY) ,  MOTSIFF W (IBM Microelectronics, VT) ,  SIMON A (IBM Semiconductor Res. and Dev. Center, NY) ,  WACHNIK R (IBM Semiconductor Res. and Dev. Center, NY) ,  RATHORE H (IBM Semiconductor Res. and Dev. Center, NY) ,  LUCE S (IBM Microelectronics, VT) ,  SLATTERY J (IBM Microelectronics, VT)
Material： Technical Digest. International Electron Devices Meeting  (IEEE International Electron Devices Meeting)
Volume： 1997  Page： 773-776  Publication year： 1997 
JST Material Number： C0829B  ISSN： 0163-1918  Document type： Proceedings
Article type： 原著論文  Country of issue： United States (USA)  Language： ENGLISH (EN)

Thesaurus term： *VLSI ,...

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JST classification (2)： Semiconductor integrated circuit  (NC03162T) ,  Manufacturing technology of solid-state devices  (NC03030V)

Terms in the title (4)： サブ ,  CMOS ,  ULSI ,  銅配線