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J-GLOBAL ID:200902180871203636   Reference number:01A0353364

A Trial of a Fast Digital Matched Filter for a Real-Valued Shift-Orthogonal Finite-Length Sequence.

シフト直交実数有限長系列に対する高速ディジタルマッチトフィルタの試作
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Material:
Volume: J84-A  Issue:Page: 374-386  Publication year: Mar. 01, 2001 
JST Material Number: S0621A  ISSN: 0913-5707  Document type: Article
Article type: 原著論文  Country of issue: Japan (JPN)  Language: JAPANESE (JA)
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Digital filter  ,  Signal theory 
Reference (12):
  • 宮川洋. 符号理論. 1974
  • TANADA, Y. Synthesis of a set of real-valued shiftorthogonal finite-length PN sequences. Proc. IEEE Fourth International Symposium on Spread Spectrum Techniques and Applications. 1996, 58-62
  • 棚田嘉博. シフト直交実数有限長系列と高速変換. 第21回情報理論とその応用シンポジウム予稿集. 1998, 735-738
  • 棚田嘉博. シフト直交実数有限長系列に対するディジタル相関器の構成. 信学技報. 1996, SST96-21
  • MATSUMOTO, T. Digital matched filter implementation on FPGA for a shift-orthogonal finite-length sequence. Proc. 10th International Symposium on Personal, Indoor and Mobile Radio Communications. 1999, 721-725
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