Art

J-GLOBAL ID：200902184117743697   Reference number：00A0262812

Low-Power High-Speed CMOS LSI Technologies. Three-Layer Cooperative Architecture for MPEG-2 Video Encoder LSI.

MPEG-2ビデオエンコーダLSI用3層協同アーキテクチャ

Author (8)： IKEDA M (NTT Cyber Space Lab., Yokosuka-shi, JPN) ,  KONDO T (NTT Electronics Corp., Ebina-shi, JPN) ,  NITTA K (NTT Cyber Space Lab., Yokosuka-shi, JPN) ,  SUGURI K (NTT Cyber Space Lab., Yokosuka-shi, JPN) ,  YOSHITOME T (NTT Cyber Space Lab., Yokosuka-shi, JPN) ,  MINAMI T (NTT Cyber Space Lab., Yokosuka-shi, JPN) ,  NAGANUMA J (NTT Cyber Space Lab., Yokosuka-shi, JPN) ,  OGURA T (NTT Cyber Space Lab., Yokosuka-shi, JPN)
Material： IEICE Transactions on Electronics (Institute of Electronics, Information and Communication Engineers)  (IEICE Trans Electron (Inst Electron Inf Commun Eng))
Volume： E83-C  Issue： 2  Page： 170-178  Publication year： Feb. 25, 2000 
JST Material Number： L1370A  ISSN： 0916-8524  Document type： Article
Article type： 原著論文  Country of issue： Japan (JPN)  Language： ENGLISH (EN)

Thesaurus term： *LSI ,...
Semi thesaurus term： MPEG-2

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JST classification (1)： Semiconductor integrated circuit  (NC03162T)

Reference (11)：

• INFORMATION TECHNOLOGY - GENERIC CODING OF MOVING PICTURES AND ASSOCIATED AUDIO. 1994
• KONDO, T. Two-chip MPEG-2 video encoder. IEEE Micro. 1996, 16, 2, 51-58
• IKEDA, M. A hardware/software concurrent design for a real-time SP@ML MPEG2 video-encoder chip set. Proc. European Design and Test Conference. 1996, 320-326
• TASHIRO, Y. MPEG2 video and audio CODEC board set for a personal computer. IEEE Global Telecommunications Conference. 1995, 1, 1, 483-487
• TERADA, N. An MPEG2-based digital CATV and VOD system using ATM-PON architecture. Proc. International Conference on Multimedia Computing and Systems. 1996

Terms in the title (5)： MPEG ,  ビデオエンコーダ ,  LSI ,  協同 ,  アーキテクチャ