Art
J-GLOBAL ID：200902191023059420
Reference number：97A0262657
A New Self-Aligned Process for Fabrication of Microemitter Arrays Using Selective Etching of Silicon.
シリコンの選択エッチングを利用したミクロエミッタアレイの製作における新しい自己整合プロセス
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Author (2)：
,
Material：
Volume：
35
Issue：
12B
Page：
6632-6636
Publication year：
Dec. 1996
JST Material Number：
G0520B
ISSN：
0021-4922
Document type：
Article
Article type：
原著論文
Country of issue：
Japan (JPN)
Language：
ENGLISH (EN)
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Semi thesaurus term：
Thesaurus term/Semi thesaurus term
Keywords indexed to the article.
All keywords is available on JDreamIII(charged).
On J-GLOBAL, this item will be available after more than half a year after the record posted. In addtion, medical articles require to login to MyJ-GLOBAL.
JST classification (2)：
JST classification
Category name(code) classified by JST.
Other solid-state devices
, Electron and ion sources
Reference (8)：
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ASANO, T. IEEE Trans.Electron Devices. 1991, 38, 2392
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SPINDT, C. A. J.Appl.Phys. 1968, 7, 3504
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ITOH, J. Proc.7th Int.Vacuum Microelectronics Conference, Grenoble, 1994. 25
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URAYAMA, M. Jpn.J.Appl.Phys. 1993, 32, 6293
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NAKAMOTO, M. Proc.7th Int.Vacuum Microelectronics Conference, Grenoble, 1994. 41
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